Novel LDNMOS embedded SCR with strong ESD robustness based on 0.5 μm 18 V CDMOS technology
来源期刊:中南大学学报(英文版)2015年第2期
论文作者:WANG Yang(汪洋) JIN Xiang-liang(金湘亮) ZHOU A-cheng(周阿铖)
文章页码:552 - 559
Key words:LDNMOS embedded SCR; TCAD simulation; electrostatic discharge (ESD) robustness; transmission line pulse (TLP)
Abstract: A novel LDNMOS embedded silicon controlled rectifier (SCR) was proposed to enhance ESD robustness of high-voltage (HV) LDNMOS based on a 0.5 μm 18 V CDMOS process. A two-dimensional (2D) device simulation and a transmission line pulse (TLP) testing were used to analyze the working mechanism and ESD performance of the novel device. Compared with the traditional GG-LDNMOS, the secondary breakdown current (It2) of the proposed device can successfully increase from 1.146 A to 3.169 A with a total width of 50 μm, and ESD current discharge efficiency is improved from 0.459 mA/μm2 to 1.884 mA/μm2. Moreover, due to their different turn-on resistances (Ron), the device with smaller channel length (L) owns a stronger ESD robustness per unit area.
WANG Yang(汪洋)1, 2, JIN Xiang-liang(金湘亮)1, 2, ZHOU A-cheng(周阿铖)1, 2
(1. Faculty of Materials, Optoelectronics and Physics, Xiangtan University, Xiangtan 411105, China;
2. Hunan Engineering Laboratory for Microelectronics, Optoelectronics and System on a Chip, Xiangtan 411105, China)
Abstract:A novel LDNMOS embedded silicon controlled rectifier (SCR) was proposed to enhance ESD robustness of high-voltage (HV) LDNMOS based on a 0.5 μm 18 V CDMOS process. A two-dimensional (2D) device simulation and a transmission line pulse (TLP) testing were used to analyze the working mechanism and ESD performance of the novel device. Compared with the traditional GG-LDNMOS, the secondary breakdown current (It2) of the proposed device can successfully increase from 1.146 A to 3.169 A with a total width of 50 μm, and ESD current discharge efficiency is improved from 0.459 mA/μm2 to 1.884 mA/μm2. Moreover, due to their different turn-on resistances (Ron), the device with smaller channel length (L) owns a stronger ESD robustness per unit area.
Key words:LDNMOS embedded SCR; TCAD simulation; electrostatic discharge (ESD) robustness; transmission line pulse (TLP)