PLD器件的模块化设计方法

来源期刊：中南大学学报(自然科学版)2001年第1期

论文作者：陈明义 郭毅

文章页码：105 - 107

关键词：硬件设计语言;可编程逻辑设计;模块化设计; ABEL语言

Key words：HDL; PLD; modular design; ABEL language

摘    要：为了帮助从事电子设计的工程技术人员理清思路,迅速掌握行之有效的PLD设计方法,对PLD器件的模块化设计方法进行了研究.模块化设计方法是从顶层原理图的设计开始,逐个设计下层模块,并逐个编译、调试,由此自上而下完成系统设计,最后组合并编译,生成熔丝图文件以供下载.此外,以Lattice公司的pLSI l016-80 PLCC44为例,通过设计1个具有调校及整点报时功能的数字钟对模块设计方法进行了研究.结果表明,使用这种方法,不仅思路清晰,实现简单,而且能够将复杂问题简单化,增强开发的条理性.

Abstract: Top level schemation is a key part of the modular design method, which is followed by every lower level module designing and debugging. At last, all these modules should be integrated and compiled to make JED to download.This paper gives an example of pLSI l016-80 PLCC44 of Lattice corporation through designing a digital clock with functions of adjusting the time and announcing the hour to research this design method. Through the design process we can see that this method make it much easier. It can also simplify the complex problemand greatly improve the consecution of program.